1. Field of the Invention
The present invention generally relates wireless communications technologies, and more particularly to a method and system for transmitted signal encoding and received signal decoding for WLAN (Wireless Local Area Network) transceivers for enhancing information transmission datarates.
2. Discussion of the Background
The IEEE standard 802.11b Wireless LANs have a technical limitation on datarates that cannot go above 5.5 and 11 Mbps in the 2.4 GHz spectrum for CCK, which is the specified modulation technique called Complementary Code Keying.
The Wireless LANs transmit and receive data over the air, minimizing the need for wired connections. Hence, wireless LANs combine data connectivity with operational mobility. Most WLAN systems use spread spectrum technology, a wide-band radio frequency technique developed for use in reliable and secure communication systems.
The modulation method called OCDM (Orthogonal Code Division Multiplex) uses multiple spreading codes on the same frequency simultaneously, and sends multiple streams of data on OCDM channels compared to OFDM (Orthogonal Frequency Division Multiplex), which send multiple streams of data on orthogonal frequency division multiplexing channels.
Traditionally, encoders and decoders of modulation coding systems use specific modulation methods. Complementary code keying (CCK) is a variation of complementary codes originally discovered only in binary (BPSK) form by M. J. E. Golay, in “Complementary Series,” IRE Transactions on Information Theory, vol. IT-7, pp 82-87, April 1961. Later, R. Sivaswamy in “Multiphase Complementary Codes,” IEEE Transactions on Information Theory, vol. IT-24, No. 5, September 1978”, found the new class of multiphase including polyphase complementary codes for QPSK, which were best suited for CCK modulation, and provided the following generic equation for complementary codes:C=[C1, C2, C3, . . . Cn,]=[exp {j(φ1)}], [exp {j(φ1+φ2)}] . . . [exp {j(φ1+φ2 . . . +φn)}],where, C is a n-chip discrete phase coded sequence of length ‘n’ represented in complex form, and the nth chip given by Cn=[exp {j(φ1+φ2+φ3 . . . +φn)}]. The code may also be expressed mathematically, by its own reversed order version as follows:C=[exp {j(φ1+φ2+φ3 . . . +φn)}], . . . [exp {jφ1+φ2)}], [exp {j(φ1)}].
Complementary codes are defined by the property that the sum of their aperiodic autocorrelation functions is zero everywhere except at the zero shift. These codes have complementary autocorrelation functions in pairs and sets, and also have good crosscorrelation functions. The CCK codes of QPSK, with four discrete phases (0°, 90°, 180°, 270°), are chosen as a modulation method to support the higher data rates of IEEE 802.11b wireless local area networks (wireless LANs), since it easily provides a path for interoperability with existing systems by maintaining the same bandwidth as the 1 Mbps and 2 Mbps data rates operating in the 2.4 GHz Industrial, Scientific and Medical (ISM) band.
The CCK method uses eight complex chips in each spreading codeword. Each chip includes one of four phases (QPSK), and a set of 256 near-orthogonal 8-Chip complementary codes are selected for CCK of IEEE 802.11b, wherein each code has been called as a codeword, sequence or symbol interchangeably.
The QPSK Complementary codes, denoted by C, for CCK can be constructed from the following formula in the format of IEEE 802.11b:
                    c        =                  {                                    ⅇ                              j                ⁡                                  (                                                            φ                      1                                        +                                          φ                      2                                        +                                          φ                      3                                        +                                          φ                      4                                                        )                                                      ,                          ⅇ                              j                ⁡                                  (                                                            φ                      1                                        +                                          φ                      3                                        +                                          φ                      4                                                        )                                                      ,                          ⅇ                              j                ⁡                                  (                                                            φ                      1                                        +                                          φ                      2                                        +                                          φ                      4                                                        )                                                      ,                          -                              ⅇ                                  j                  ⁡                                      (                                                                  φ                        1                                            +                                              φ                        4                                                              )                                                                        ,                          ⅇ                              j                ⁡                                  (                                                            φ                      1                                        +                                          φ                      2                                        +                                          φ                      3                                                        )                                                      ,                          ⅇ                              j                ⁡                                  (                                                            φ                      1                                        +                                          φ                      3                                                        )                                                      ,                          -                              ⅇ                                  j                  ⁡                                      (                                                                  φ                        1                                            +                                              φ                        2                                                              )                                                                        ,                          ⅇ                              jφ                1                                              }                                    (        1        )            where, φ1, φ2, φ3, and φ4 are from the four phases of QPSK.
The CCK codes may be decoded by many methods: first, there is an optimal maximum likelihood method that needs a bank of 256 correlators in the receiver. However, this optimal method may be considered too complex for implementation. In order to solve this problem, there are many sub-optimum decoding methods that are less complex to implement.
Intersil (registered trademark, formerly Harris Corporation) provides under its trademark “PRISM” a chip set for related art DSSS (Direct Sequence Spread Spectrum) wireless transceivers complying with the IEEE 802.11 standard. The nomenclature HFA 3861A designates the baseband processor of the PRISM chip set.
The baseband processor HFA 3861A provides for differential binary phase shift keying (DBPSK) and differential Quadrature Phase Shift Keying (DQPSK) modulation schemes with data scrambling capability along with complimentary code keying (CCK) to provide the data rates of 5.5 and 11 Mbps.
The HFA3861A, implements the CCK codewords to achieve Ethernet data rates over wireless links, and provides robust packet error rate performance in multipath environments through the use of a RAKE Receiver.
FIG. 2a, FIG. 2b, FIG. 3a and FIG. 3b, show related art block diagrams of the data transmitting and receiving functionality of the IEEE 802.11b Wireless LAN operation with CCK modulator scheme.
Texas Instruments provides the TMS320C6416 DSP, (registered trademark of Texas Instruments) Digital Signal Processing (DSP) hardware platform to implement related art IEEE 802.11b WLAN standard in software.
It is to be noted that the IEEE 802.11b standard is limited to the data rates of 5.5 and 11 Mbps, and has no higher datarate options for encoding with CCK.
IEEE 802.11b specifies CCK modulation as standard, but other traditional encoders and decoders of modulation and coding schemes use specific modulation methods, which need modifications to the already standardized IEEE 802.11b Physical Layer (PHY) and Wireless LAN Medium Access Control (MAC) are not mandated because of the incompatibility.
It is also highly desirable to utilize SDR (Software Defined Radio) and SoC (System-on-Chip) technologies, which accommodate large scale memory and processor requirements needed to implement the ever-increasing demand for higher and higher datarates for wireless data transmission.
IEEE Standard 802.11 Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications) is a protocol standard for wireless LAN communication. Its physical layer in the transmitter is responsible for encoding and modulating a packet into baseband signals for a stream of digitized information bits in the physical layer. In particular, IEEE 802.11b high datarate standard implements DS-Spread Spectrum technique using the standard form of CCK encoding scheme to achieve 5.5 and 11 Mbps datarates in Wireless LANs. The CCK encoding scheme requires that digital data be encoded by a complementary code belonging to a set of 256 codes. The digital data comprising eight bits (8-bits) of information is encoded on a 8-Chip CCK codeword and is transmitted at any given time, which results in 11 Mbps of maximum datarate.